Integrated circuits, such as microprocessors, are formed on semiconductor wafers, which are then sawed into individual semiconductor chips, also known as microelectronic dies. Each resulting die is then mounted on a package substrate, and the package substrate is then mounted on a motherboard. The package substrate provides structural integrity for communication with the die.
The package substrate often has a number of Ball Grid Array (BGA) solder ball contact formations on an opposing side, which are electrically connected to the integrated circuit through vias and signal routers in and on the package substrate between the integrated circuit and the motherboard.
In existing assemblies of the above kind, on-die device parasitic capacitance and package substrate parasitic inductance result in a low bandwidth for high-speed buses due to reduced signal quality at the driver and receiver circuits. At a high signaling bit rate (e.g., 15 GHz and above), a 3×-4× reduction of on-die device parasitic capacitance is required to provide the required bandwidth of the high-speed bus. Additionally, as a result of this parasitic capacitance and inductance, there are undesirable deviations, such as crosstalk, wherein the waveform on a trace couples with an adjacent trace. Crosstalk causes smaller signal amplitudes and degraded transition times, making it more difficult to determine the correct phase for each particular signal. Parasitic capacitance also interacts with inductance planes in the package substrate to create resonance which results in return loss, preventing higher frequencies and reducing signal quality.